As newer DRAMs advance into smaller process geometries, we are seeing in increase of chips that contain "weak" bits. These are chips that may have a microscopic defect in an individual cell. This defect is not enough to cause a failure outright, but will start exhibiting itself after of few months of field operation when a DIMM module has been installed in an end customer's facility.

DRAM modules, like most other electronic components, follow a well-known reliability curve called the "bathtub curve". The phenomena shows that most of the failures occur during an early life phase which will typically span a few months of field operation. At that period's conclusion, the component will go through a highly reliable useful life phase which will last as long as 20 years. Eventually, the component will start to wear out, although not before functioning for a very long time. Most electronic components never get to the wear-out phase because they the system normally become obsolete and are replaced with more modern technology long before the component reaches the wear-out phase.

To improve reliability, STEC has developed a proprietary test system called TDBI (Test During Burn-In), that can run dynamic test patterns on a large number of DIMMs while they are undergoing both thermal and electrical stress. The DIMMs are placed in a thermal chamber that can raise the temperature as high as 125C and a voltage as high as 3.5 volts and then tested at a 100% utilization rate for many hours. This dynamic testing is able to weed out the DRAM chips with weak bits so that they are not shipped out to our customers. In effect we can provide the DIMM module with the equivalent of 3-6 of early operating lifetime in a much shorter period of the TDBI test. Our estimate is that this process can improve DIMM module MTBF by a factor between 2x and 10x and provide the ultimate in system reliability for systems that require 24/7 operation.

Although most DRAM chips undergo a static burn-in at the chip level, TDBI offers a very unique and far more comprehensive testing capability because it provides a burn-in test at the module level while dynamically running and checking test patterns as the module is performing under stress conditions.